1 | Course Title: | COMPUTER ARCHITECTURE |
2 | Course Code: | BMB3002 |
3 | Type of Course: | Compulsory |
4 | Level of Course: | First Cycle |
5 | Year of Study: | 3 |
6 | Semester: | 6 |
7 | ECTS Credits Allocated: | 5 |
8 | Theoretical (hour/week): | 3 |
9 | Practice (hour/week) : | 0 |
10 | Laboratory (hour/week) : | 0 |
11 | Prerequisites: | None |
12 | Recommended optional programme components: | None |
13 | Language: | Turkish |
14 | Mode of Delivery: | Face to face |
15 | Course Coordinator: | Dr. Ögr. Üyesi Metin BİLGİN |
16 | Course Lecturers: | |
17 | Contactinformation of the Course Coordinator: |
Bilgisayar Müh. Bölüm Binası, 1. kat, oda 3 Tel.:+90 (224) 275 52 63 email: metinbilgin at uludag.edu.tr |
18 | Website: | |
19 | Objective of the Course: | Teaching basic ideas about modern computer architecture is the main aim. To teach concepts about CPU design and memory hierarchies. |
20 | Contribution of the Course to Professional Development |
21 | Learning Outcomes: |
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22 | Course Content: |
Week | Theoretical | Practical |
1 | One processor and multiple processor systems-Ahmdal's law | |
2 | Memory management: Virtual memory systems, paging and segmentation | |
3 | Cache memory systems and replacement algorithms | |
4 | Pipeline processor design | |
5 | Feedback pipelines, reservation tables and collision vector | |
6 | A comparison of RISC-CISC architectures | |
7 | Shared memory multiprocessor systems and Flynn’s classification | |
8 | Bus based multiprocessor systems: Crossbar switch and multi-gate memory | |
9 | Interconnected networks: a-Dynamic Interconnected networks: Multistage Networks (Omega Network) b-Static Interconnected networks: Star, Ring, Mesh, Hypercube and Tree network | |
10 | Message Passing Interface (MPI) | |
11 | Point-to-point Communication | |
12 | Collective Communication | |
13 | Parallel algorithms for vector-matrix multiplication and matrix transpose | |
14 | Fox and Cannon algorithms for matrix multiplication |
23 | Textbooks, References and/or Other Materials: | Computer Architecture, A Quantitative Approach, John L. Hennessy and David A. Patterson, Fifth Edition |
24 | Assesment |
TERM LEARNING ACTIVITIES | NUMBER | PERCENT |
Midterm Exam | 1 | 40 |
Quiz | 0 | 0 |
Homeworks, Performances | 0 | 0 |
Final Exam | 1 | 60 |
Total | 2 | 100 |
Contribution of Term (Year) Learning Activities to Success Grade | 40 | |
Contribution of Final Exam to Success Grade | 60 | |
Total | 100 | |
Measurement and Evaluation Techniques Used in the Course | ||
Information |
25 | ECTS / WORK LOAD TABLE |
Activites | NUMBER | TIME [Hour] | Total WorkLoad [Hour] |
Theoretical | 14 | 3 | 42 |
Practicals/Labs | 0 | 0 | 0 |
Self Study and Preparation | 14 | 7 | 98 |
Homeworks, Performances | 0 | 0 | 0 |
Projects | 0 | 0 | 0 |
Field Studies | 0 | 0 | 0 |
Midtermexams | 1 | 2 | 2 |
Others | 0 | 0 | 0 |
Final Exams | 1 | 2 | 2 |
Total WorkLoad | 144 | ||
Total workload/ 30 hr | 4,8 | ||
ECTS Credit of the Course | 5 |
26 | CONTRIBUTION OF LEARNING OUTCOMES TO PROGRAMME QUALIFICATIONS | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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LO: Learning Objectives | PQ: Program Qualifications |
Contribution Level: | 1 Very Low | 2 Low | 3 Medium | 4 High | 5 Very High |