Türkçe English Rapor to Course Content
COURSE SYLLABUS
LOGIC CIRCUITS
1 Course Title: LOGIC CIRCUITS
2 Course Code: BMB2005
3 Type of Course: Compulsory
4 Level of Course: First Cycle
5 Year of Study: 2
6 Semester: 3
7 ECTS Credits Allocated: 7
8 Theoretical (hour/week): 3
9 Practice (hour/week) : 0
10 Laboratory (hour/week) : 0
11 Prerequisites: None
12 Recommended optional programme components: None
13 Language: Turkish
14 Mode of Delivery: Face to face
15 Course Coordinator: Prof. Dr. KEMAL FİDANBOYLU
16 Course Lecturers: -
17 Contactinformation of the Course Coordinator: e-posta: kfidan@uludag.edu.tr
Uludağ Üniversitesi, Bilgisayar Mühendisliği Bölümü
Görükle Kampüsü, 16059 Nilüfer, Bursa
18 Website:
19 Objective of the Course: Comprehend the principles of digital logic circuits, gain the ability to analyze and design both combinational and sequential digital logic circuits and use them in applications.
20 Contribution of the Course to Professional Development Engineering Science: 80%; Engineering Design: 20%
21 Learning Outcomes:
1 Transform different base number systems to desired number system;
2 Perform arithmetic operations with binary, octal, hexadecimal and decimal number systems;
3 Describe different coding schemes used in digital systems;
4 Use Boolean algebra to analyze digital logic gates;
5 Practice simplification of Boolean functions using K-maps and Boolean theorems;
6 Implement Boolean functions using different types of logic gates;
7 Examine the analysis and design of binary adders, subtractors, multipliers and magnitude comparators;
8 Illustrate the analysis and design of decoders, encoders, multiplexers and demultiplexers;
9 Outline the analysis and design of latches, flip-flops and registers;
10 Examine the analysis and design of synchronous and asynchronous counters; Describe memory units and programmable logic devices;
22 Course Content:
Week Theoretical Practical
1 Digital Systems and Binary Numbers
2 Boolean Algebra and Logic Gates
3 Gate-Level Minimization-1
4 Gate-Level Minimization-2
5 Combinational Logic-1
6 Combinational Logic-2
7 Combinational Logic-3
8 Synchronous Sequential Logic-1
9 Synchronous Sequential Logic-2
10 Synchronous Sequential Logic-3
11 Registers and Counters-1
12 Registers and Counters-2
13 Memory and Programmable Logic-1
14 Memory and Programmable Logic-2
23 Textbooks, References and/or Other Materials: M. Morris Mano and Michael D. Ciletti, Digital Design, 6th Global Ed., Pearson Education 2019.
24 Assesment
TERM LEARNING ACTIVITIES NUMBER PERCENT
Midterm Exam 1 40
Quiz 0 0
Homeworks, Performances 0 0
Final Exam 1 60
Total 2 100
Contribution of Term (Year) Learning Activities to Success Grade 40
Contribution of Final Exam to Success Grade 60
Total 100
Measurement and Evaluation Techniques Used in the Course Classical problem-solving ability will be measured in midterm and final exams.
Information All exam evaluations will be made over 100. It will then be multiplied by the respective contribution percentage and the overall course grade will be obtained out of 100.
25 ECTS / WORK LOAD TABLE
Activites NUMBER TIME [Hour] Total WorkLoad [Hour]
Theoretical 14 3 42
Practicals/Labs 0 0 0
Self Study and Preparation 14 6 84
Homeworks, Performances 0 0 0
Projects 0 0 0
Field Studies 0 0 0
Midtermexams 1 35 35
Others 0 0 0
Final Exams 1 49 49
Total WorkLoad 210
Total workload/ 30 hr 7
ECTS Credit of the Course 7
26 CONTRIBUTION OF LEARNING OUTCOMES TO PROGRAMME QUALIFICATIONS
PQ1 PQ2 PQ3 PQ4 PQ5 PQ6 PQ7 PQ8 PQ9 PQ10 PQ11 PQ12
LO1 5 5 5 4 1 1 1 1 1 1 1 1
LO2 5 5 5 4 1 1 1 1 1 1 1 1
LO3 5 5 5 4 1 1 1 1 1 1 1 1
LO4 5 5 5 4 1 1 1 1 1 1 1 1
LO5 5 5 5 4 1 1 1 1 1 1 1 1
LO6 5 5 5 4 1 1 1 1 1 1 1 1
LO7 5 5 5 4 1 1 1 1 1 1 1 1
LO8 5 5 5 4 1 1 1 1 1 1 1 1
LO9 5 5 5 4 1 1 1 1 1 1 1 1
LO10 5 5 5 4 1 1 1 1 1 1 1 1
LO: Learning Objectives PQ: Program Qualifications
Contribution Level: 1 Very Low 2 Low 3 Medium 4 High 5 Very High
Bologna Communication
E-Mail : bologna@uludag.edu.tr
Design and Coding
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